Introduction
KDF11-AX (M8186) CPU Module
This is a frequently encountered two slot CPU board. It supports an 18 bit address space through an MMU (Memory Manage Unit). It does not include the bootstrap and diagnostic capability nor SLUs as does the M8189, normally one or more additional boards (see below) provide this functionality. ODT is built into the microcode.
\ / M8186 REV A \ /
--------------------------------------
| o-W19-o |
| o-W18-o |
| |
| |
| M S F C o-W17-o o |
| M P P P -W01- |
| U A I U o |
R S o
E -W16-
o
o-W15-o
o-W14-o
o-W13-o
o-W12-o
o-W11-o
o-W10-o
o-W09-o
o-W08-o
o-W07-o o-W04-o
o-W06-o o-W2-o
o-W05-o E2 <- see note on W3
| |
| E1 |
|_ _ _|
|_______________| |________________|
B A
\ / M8186 REV C \ /
--------------------------------------
| |
| o-W18-o |
| |
| |
| M S F C o-W1-o |
| M P P P |
| U A I U |
R S
E
o-W15-o
o-W14-o
o-W13-o
o-W12-o
o-W11-o
o-W10-o
o-W09-o
o-W08-o
o-W07-o o-W04-o
o-W06-o
o-W05-o E2
o-W03-o
o-W02-o
| o-W16-o |
| o-W17-o E1 |
|_ _ _|
|_______________| |________________|
B A
Note one of my manuals has a fairly lengthy section on
the Revision history. Apparently there are slight differences
in some of the jumper locations so if yours doesn't look
exactly like those above, I hope its close. The manual claims
the revision number is stamped into the module handle,
but mine has no such stamp. ECO's included A0-A7 and
C0-C3, although nothing below A3 was shipped. There
is also no revision B for some reason.
These are typical wire wrap stakes, and a wire wrap could
be used, but the factory installs a tin jumper.
The one I'm holding in my hand now seems to be something
between the boards shown above. Apparently W18 is vertically
oriented rather than horizontal as shown above, and there is
no W02 or W03. Maybe this makes it a revision A as the Service
Manual says "On etch 'A' modules, W3 is installed by
soldering a jumper wire from E2 pin 5 to E2 pin 15."
However it does have W16 and W17 as indicated for a REV C,
and a horizontal set of pins where W1 should be so it could
be a REV C?
Note Rev A above has an extra W19, and no W3. W2,W16, and
W17 are relocated, with W1 and W16 now being vertically oriented.
Most of this doesn't matter a lot, cause you aren't supposed to
mess with these!
In the tables below 'I' => jumper installed, 'R' => removed.
All revisions list four jumpers as DEC reserved, and says
jumper should be set at factory configuration. W18 is
revision specific.
Jumper Name Function Factory Set
W1 Master Clock I = enable I
W2 Reserved Factory Set O
W3 Reserved Factory Set I
W4 Line event O = enable I
W5 power-up mode (see 1 below) I
W6 power-up mode (see 1 below) O
W7 halt trap O = enter ODT I
W8 bootstrap mode I = 173000 I
W9-15 bootstrap adr (see 2 below) I
W16-17 Reserved Factory Set I
W18 (A) Reserved Factory Set I
W18 (C) Wake up circuit O = enable I
1) Power up modes are defined by jumpers W5 and W6
mode W5 W6
0 pc@24,ps@26 O O
1 console ODT I O
2 bootstrap O I
ie if you want it to use bootstrap ROM install W6
if you want it to start up in ODT install W5
2) If W8 is out, W9 through W15 define the starting bootstrap
address, if installed the standard 17300 (octal is used).
W9-W15 correspond to address bits 9 through 15 respectively.
In is a logical 1, out is a logical 0.
The following diagnostic programs are mentioned:
JKDBBO CPU trap and EIS
JKDABO MMU (requires KTF11-A option, ie MMU chip)
JKDCAO FPIS part 1
JKDDAO FPIS part 2
Note the FPIS (Floating Point Instruction Set) was an
option as was the MMU in some. FPIS requires an MMU.